In low power communications equipment, such as Internet of Things (IoT) devices, a need arises to generate and measure accurate time intervals. The typical approach for this is to use a high precision clock source such as a crystal oscillator, which has very good stability but must be run continuously. In the prior art, the power consumption of an oscillator is related to the frequency of oscillation largely because of the displacement currents generated from charging and discharging dielectrics used in distributing the clock signal. In addition, in low power equipment, it is typical for the clock oscillator to have the lowest frequency which represents a least common multiple of the desired frequencies. For example, if the low power clock source is needed at 8 Khz (a 125 us cycle time), then a multiple of 8 Khz would be used, such as a commonly available 32 Khz oscillator followed by a divide by 4 circuit. This works well for generating frequencies which are 32 KHz/n, such as 32 KHz, 16 KHz, 10.67 KHz, 8 Khz, etc, for n=1, 2, 3, 4, respectively. A difficulty arises when, for example, a 9 Khz source is needed as well as an 8 Khz source, for which the oscillator frequency must be changed to a multiple of the least common multiple of 8 Mhz and 9 Mhz, such as 72 Khz. Phase lock loop methods with non-integer dividers and frequency multipliers may be used to generate frequencies more flexibly, at the expense of increased power consumption.
A related problem is timestamp generation for external events. Greater resolution of the timestamp requires a faster clock frequency which comes at the expense of higher steady state current.
It is desired to provide a clock generation system and a timestamp system which is low power and provides fine-grain control.